eMMC 的 hardware rese pin - RST_n

JESD84-C44.pdf
Embedded MultiMediaCard
(e•MMC) Mechanical Standard,
with Optional Reset Signal

p.7:

Reset :RST_n 
Reset signal is used for host resetting device, moving the device to pre-idle state.
By default, the RST_n signal is temporary disabled in device. Host need to set bit[0:1] in
the extended CSD register [162] to 0x1 to enable this functionality before the host uses.

About Extended CSD Register:

The 512 bytes long Extended CSD register defines the Device properties and selected modes.
The Higher 320 bytes are the Properties segment, which defines the Device capabilities and cannot be
modified by the host. 
The lower 192 bytes are the Modes segment, which defines the configuration the
Device is working in. These modes can be changed by the host by means of the SWITCH command.

更新版：EMMC_JESD84-A441
p.164:

RST_n_FUNCTION [162]

For backward compatibility reason, RST_n signal is temporary disabled in device by default. Host may
need to set the signal as either permanently enable or permanently disable before it uses the card.
Bit[7:2]: Reserved
Bit[1:0]: RST_n_ENABLE (Reable and Writable once)
0x0: RST_n signal is temporarily disabled (default)
0x1: RST_n signal is permanently enabled
0x2: RST_n signal is permanently disabled
0x3: Reserved

By default, RST_n_ENABLE is set to 0x0, which is RST_n is temporarily disabled. Host can change the
value to either 0x1 (permanently enabled) or 0x2 (permanently disabled). Once host sets the value to either
one, the value can not be changed again.

Once host sets RST_n_ENABLE bits to 0x2 (permanently disabled), the card will not accept the input of
RST_n signal permanently.
During the disable period, the card has to take care that any state of RST_n (high, low and floating) will
not cause any issue (i.e. mal function and high leakage current in the input buffer) in the device.
When RST_n_ENABLE is set to 0x1 (permanently enabled), the card accepts the input of RST_n permanently.
Host can not change the bits back to the disabled values. Also, when host set RST_n_ENABLE to
0x1, the card must not start resetting internal circuits by triggering the register bit change. Internal reset
sequence must be triggered by RST_n rising edge but not by the register change.
Since card does not have any internal pull up or pull down resistor on RST_n terminal, host has to pull up
or down RST_n to prevent the input circuits from flowing unnecessary leakage current when RST_n is
enabled

---

在 http://www.mt-system.ru/sites/default/files/klmxgxge4a-x001mmc4_41_2ynm_based_emmc1_1.pdf
p.22
Extend CSD register 162 的 properties 是：R/W: One time programmable and readable

一樣，在 micross eMMC datasheet 也有。
說得更仔細， ECSD 的幾種 cell ：

R  Read-only
R/W  One-time programmable and readable
R/W/E  Multiple writable with the value kept after a power cycle, assertion of the RST_n signal, and any
  CMD0 reset, and readable
R/W/C_P  Writable after the value is cleared by a power cycle and assertion of the RST_n signal (the
  value not cleared by CMD0 reset) and readable
R/W/E_P  Multiple writable with the value reset after a power cycle, assertion of the RST_n signal, and
  any CMD0 reset, and readable
W/E_P  Multiple writable with the value reset after power cycle, assertion of the RST_n signal, and any
  CMD0 reset, and not readable

所以 chip 的 ECSD 162 一但 enable 後，就沒辦法 disable 了。
--- 和 A441 說的不一樣？

---

Software 的 reset 是... CMD0
ref: SD Physical Layer Spec
p.24:

4.2.1 Card Reset
The command GO_IDLE_STATE (CMD0) is the software reset command and sets each card into Idle
State regardless of the current card state. Cards in Inactive State are not affected by this command.
After power-on by the host, all cards are in Idle State, including the cards that have been in Inactive
State before.
After power-on or CMD0, all cards’ CMD lines are in input mode, waiting for start bit of the next command.
The cards are initialized with a default relative card address (RCA=0x0000) and with a default
driver stage register setting (lowest speed, highest driving current capability).